Engineering Projects & Experience

Software & Hardware Projects

Maze Generation System

C++ Data Structures & Algorithms

Programmed a two-dimensional grid application in C++ dedicated to generating perfect rectangular mazes. Constructed the core generation engine using a randomized graph-theory approach, ensuring a singular continuous path links any two coordinates. Managed structural arrays and visual output formatting to produce clear, console-ready puzzle layouts for end-users.

  • Implemented Kruskal's algorithm and disjoint-set (union-find) data structures to model the maze as a Minimum Spanning Tree (MST).
  • Designed efficient grid initialization and randomized edge generation via `std::shuffle()` to ensure unique maze layouts on every execution.
  • Rendered the final generated spanning tree using an ASCII-based console visualization.
C++ Kruskal's Algorithm Graph Theory

Class AB Audio Amplifier with Darlington Buffer

Discrete Multi-Stage Amplifier Design

Constructed a physical, low-voltage audio amplification circuit tailored to drive standard low-impedance loads. Engineered the internal architecture by coupling a common-emitter core with a buffer and a push-pull driver stage. Solved critical loading effect issues and ensured clean signal delivery through targeted component calibration and precise frequency cutoff tuning.

  • Achieved a total system gain of 230.26 V/V and a peak-to-peak output of 2.6V, exceeding simulated predictions.
  • Confirmed operational bandwidth of 500 Hz to 10.9 kHz, optimized for mid-range audio reproduction.
  • Conducted rigorous LTspice simulations and hardware breadboard testing, utilizing diode biasing to minimize crossover distortion.
LTspice BJT Analysis Circuit Design

5-Stage DC Motor Speed Controller

Pulse-Width Modulation Implementation

Engineered an analog speed control unit for direct-current motors utilizing custom-built oscillator stages. Designed the underlying timing architecture with interconnected multivibrator circuits to manipulate terminal voltage precisely. Transitioned the completed schematic from digital simulation environments directly into a soldered physical prototype to regulate mechanical output dynamically.

  • Generated a PWM signal operating at 4000 Hz, with a tunable duty cycle swinging from 55% to 85% via potentiometer control.
  • Conditioned the astable output using an intermediate gain stage (common-emitter switch) to cleanly trigger the monostable network.
  • Successfully built and verified the circuit on a breadboard, adhering within a strict ±100 Hz and 5% tolerance margin.
Analog Electronics LTspice PWM Control

Automatic Washing Machine PLC Control

Industrial Automation Logic Design

Programmed a Siemens Programmable Logic Controller (PLC) using Ladder Diagram to automate the cycle sequences of a washing machine. The system interfaced with pushbutton controls, pilot lamp indicators, and contactor relays.

  • Developed complex logic to manage variable Wash, Rinse, and Spin cycles dynamically based on user-selected load levels and program types (Normal, Delicate, Heavy).
  • Simulated bidirectional drum movement by alternating CW and CCW jogs of a Shunt DC Machine with precise hold intervals.
  • Implemented safety interlocks, including an emergency stop feature with dynamic braking, and state-retention pausing functions.
Siemens PLC Ladder Logic Motor Control

Leadership & Organizations

UP Engineering Student Council

EEE Representative

Diliman, Quezon City | Oct 2025 – Present
  • Serves as the liaison between the students and administration of the UP Electrical and Electronics Engineering Institute (EEEI).
  • Publicity head of Engineering Week 2026, showcasing the diverse talents of the Engineering community through events and games.

UP Engineering Radio Guild

Member

Diliman, Quezon City | June 2025 – Present
  • As External Affairs Committee member, evaluated sponsorship and partnership proposals sent to UP ERG.
  • Programs Associate of Chill Ikot 2026, a welcoming event for Freshies, Shiftees, and Transferees of UP College of Engineering.

UP DOST Scholars' Association

Member

Diliman, Quezon City | Feb 2025 – Present
  • Coordinated the Project WISKO initiative with NADS, conducting mock exams for the 2025 DOST Undergraduate Scholarship.
  • As Logistics Head for Scholars' Day Out, was responsible for managing supplier databases, tracking inventory, and coordinating the distribution of food and supplies for a seamless campus tour.

START DOST

Deputy Chief Communications Officer for Sponsorships & Media

Philippines | Oct 2025 – Mar 2026
  • Helped secure sponsors and partners for KickSTART and TechSTART 2026, initiatives equipping DOST scholars nationwide with knowledge in modern technology.

NCR Alliance of DOST Scholars

Officer

Bicutan, Taguig City | May 2025 – Dec 2025
  • Created and managed databases of company details for potential partnerships as an External Affairs Committee officer.
  • Headed the Sponsorships and Partnerships Committee of the 2025 Scholars Colloquium to foster research excellence and innovation.